DBBC3 commissioning

Overheating issue

After loading the tap filters in the OCT mode temperatures on the Core boards were observed to rise significantly (typically by 4-5 deg). Letting the system run over night has caused failure. As a counter-measure the top cover was removed an a fan unit with 3 fans (two front one back side) was installed. Also an additional cooling vent was installed on the floor in front of the rack that hosts the DBBC3. This was sufficient to prevent failure even over a few hours of operations. However removing the fan unit in order to do maintenance caused system failure after a few seconds. The DBBC3 was therefore removed from the top position in the rack and was moved to the very bottom just in front of the floor vent. This has lowered  the temperature at the air intake by another 4 degrees. Salvador also reworked the lid fan unit. It now hosts 4 fans with higher capacity: threee directly above the core boards and one directly over the GCOMO units. Monitoring with ChipScope shows the FPGA temperatures not to increase above 56 degrees even when continously running the tap filters. Core board C is the hottest the outside boards are coller by about 5 degreees.

TODO: check with Gino./Michael if the distance between core boards can be increased.

01.02.2017

Mounted Front Cover and new Top Cover with Fans provided by Salvador, will let it run over night to see if still overheating with covers.

Cleaned up harddrive to remove old and unused files.

31.01.2017

Second Observation run with new Control Software version. No more drift from individual sampler power levels. 

30.01.2017

Changed Control Software to remove oscillation in AGC Control, so that fine adjustment of offset and gain on Core3H can be activated.

Prepared DBBC3 with this new configuration.

29.01.2017

First Observation run, no problems with DBBC3 despite small drifts in power levels.

28.01.2017

Prepared DBBC3 for Observation starting 29 th at 2:30. No Problems, only small drift in power levels of two samplers. 

27.01.2017

DBBC3: Checked the stats of DBBC3 after letting it run over night with covers mounted, it lost synchronization in the first sampler of the first module. After resetting samplers it immediately lost synchronization again. Removed covers and let it cool down for 30 minutes. With covers removed DBBC3 was running stable for the whole day.  
Recalibrated DBBC3 with ambient load from antenna as noise, powerlevel and stats from samplers had very good values.

26.01.2017

24.01.2017

DBBC3: Made Zero-Baseline Tests with modules 1 and 2, including down-conversion (6 GHz tone injected). 

23.01.2017

DBBC3: Further testing and recording, made some modifications to the control software to improve calibration accuracy and speed.

22.01.2017

DBBC3: After reattaching the SMA connector to IFA 0-4 GHz input, the connector on the GCoMo side got loose,.This caused an SMA cable in the GCoMo to get ripped of. We were able to find a replacement cable and repair the GCoMo. We replaced the snap-rings to prevent further loosening of the connectors.

Tested modules 3 and 4, found that sampler 2 of module 3 is hanging, sending only FFFs to the Core3H. This was not the case in the lab in Bonn, suspected that the connectors got damaged during transport or reassembling. Checked the 140-pin connectors under the microscope, some of the pins have almost no soldering. Since modules 1, 2 and 4 are working fine and only two modules are needed for run in April, we dediced to leave it that way until after the run.

21.1.2017

Mark6 ethernet: pv-mark6-1 lost 10G network connection occasionally. Inspection showed that this is only affecting the two ethernet ports of the card being close to the chassis edge. This is very likely due to the transceivers becoming critically hot due to bad airflow within the mark6 chassis. As a workaround the transceivers were placed into  pv-mark6-3 as it is closer to the floor with lower ambient air temperature. The mark6 machines were taken from the rack and the network cards were rearranged (closer to the middle and leaving a one-slot gap between them).

Mark6 installation: installation of the 2015 version of the mark6 software was finished on pv-mark6-3 and pv-mark6-4. The system time was set to UTC and the proper NTP functionality was verified. On pv-mark6-4 a problem occured when trying to open a group (permission problem on /mnt/disk/?/? tree). Deleting the /mnt/disks tree and recreating it by hand has solved the problem.

DBBC3: Testing of DBBC3 was continued with recordings on mark6. Recording only works if correct MAC-Addresses are set in Core3H-Config-Files. Recording was done with noise and 4.5 GHz line, to test down-conversion, which is working as expected. 

20.1.2017

DBBC3:

• Unpacked and reassembled DBBC3, no visible damage
• One of the fibre cables for connecting the mark6 turned out to be defective. Used the fibre of the DBBC2 FiLA10G board as a temporary replacement.
• Installation and first testing of DBBC3:
  • The powerlevel of 10 MHz had to be adjusted (should be between 0 and 3 dBm)
  • recalibration: levels of gain, offset and delay were as expected, only small adjustments necessary
  • connected 2-18 GHz noise source on 4-8 GHz input of IF A and IF B, we had to use 3 dBm attenuators on input to get power levels in good range for DBBC3:
    • agc target value 28000
    • results in attenuation 15 to 16 dBm in GCoMo with agc on.
  • GPS timesync working fine