VLBI - PV Support

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Combined revision comparison

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DBBC2: Installed the latest DDC firmware (v107 beta3) to be unsed in the 4Gbps test. Calibration looked a bit odd for board B. Sven had a look from remote and managed to successfully calibrate~~unsuccesfull for CoreBoard B at the moment. Sven will have~~ a look.
FS update: installed fs-9.13.1-rc1
DBBC3: Installed DDC_V 123 to be used during the upcoming 4Gbps test (f191a and the regular GMVA session (c191X). The associated config file was updated with the parameters relevant for PV. Installed the latest dbbc3 tools and confirmed that the system is in an operational state.
4Gbps test (f191a): The test setup is described here. DBBC2 and DBBC3 recorded in parallel. For the test the DBBC2 was running DDC v107 using 64MHz wide subbands and a vsi_clk=128. The clock had to be manually set prior to loading the Fila10G setup as drudg does not properly set the clock in the procedure file. Also the Fila10G vsi_samplerate had to be set to 128000000. The DBBC3 was running DDC_V 123 with 32MHz wide subbands. Correlation will be done in Bonn once all modules have been received.
2Gbps fringe test (f191b): prior to the regular GMVA session a fringe test was performed. Friges were found for PV. For details see here.

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This revision modified by rottmann (Ban)

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DBBC2: Installed the latest DDC firmware (v107 beta3) to be unsed in the 4Gbps test. Calibration ~~unsuccesfull for CoreBoard B at the moment. Sven will have~~ a look.
FS update: installed fs-9.13.1-rc1

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This revision modified by rottmann (Ban)

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DBBC2: Installed the latest DDC firmware (v107 beta3) to be unsed in the 4Gbps test. Calibration looked a bit odd for board B. Sven had a look from remote and managed to successfully calibrate.
FS update: installed fs-9.13.1-rc1
DBBC3: Installed DDC_V 123 to be used during the upcoming 4Gbps test (f191a and the regular GMVA session (c191X). The associated config file was updated with the parameters relevant for PV. Installed the latest dbbc3 tools and confirmed that the system is in an operational state.
4Gbps test (f191a): The test setup is described here. DBBC2 and DBBC3 recorded in parallel. For the test the DBBC2 was running DDC v107 using 64MHz wide subbands and a vsi_clk=128. The clock had to be manually set prior to loading the Fila10G setup as drudg does not properly set the clock in the procedure file. Also the Fila10G vsi_samplerate had to be set to 128000000. The DBBC3 was running DDC_V 123 with 32MHz wide subbands. Correlation will be done in Bonn once all modules have been received.
2Gbps fringe test (f191b): prior to the regular GMVA session a fringe test was performed. Friges were found for PV. For details see here.

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