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(env) [oper@cc-pico utilities]$ ./setupDBBC3_DDC_V.py -n 4 192.168.0.60 --ignore-errors -i A B Selecting commandset version: DBBC3Commandset_DDC_V_123 ===Trying to connect to 192.168.0.60:4000 ===Connected ===Checking 1PPS synchronisation [WARN] The following boards report pps_delay=0: ['C', 'D'] [RESOLUTION] Check if these boards have been disabled in the DBBC3 config file === Checking time synchronisation of core board A [OK] Reported time: 2019-04-04 11:31:07 ===Checking synthesizer lock state of board A [OK] Locked ===Checking GCoMo synthesizer frequency of board A [OK] Freq=9048 MHz === Checking IF power level on core board A [OK] count = 31895 ===Checking sampler gains for board A [OK] sampler powers = [70874617, 71217086, 71445220, 70643756] ===Checking sampler offsets for board A sampler 0 [OK] Asymmetry = 0.000604% ===Checking sampler offsets for board A sampler 1 [OK] Asymmetry = 0.006149% ===Checking sampler offsets for board A sampler 2 [OK] Asymmetry = 0.020379% ===Checking sampler offsets for board A sampler 3 [OK] Asymmetry = 0.014416% === Checking time synchronisation of core board B [OK] Reported time: 2019-04-04 11:31:18 ===Checking synthesizer lock state of board B [OK] Locked ===Checking GCoMo synthesizer frequency of board B [OK] Freq=9048 MHz === Checking IF power level on core board B [OK] count = 31750 ===Checking sampler gains for board B [OK] sampler powers = [82511346, 82256136, 85668418, 81651315] ===Checking sampler offsets for board B sampler 0 [OK] Asymmetry = 0.007875% ===Checking sampler offsets for board B sampler 1 [OK] Asymmetry = 0.003713% ===Checking sampler offsets for board B sampler 2 [OK] Asymmetry = 0.012987% ===Checking sampler offsets for board B sampler 3 [OK] Asymmetry = 0.010675% === Done
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Version from 18:37, 4 Apr 2019
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Version as of 18:38, 4 Apr 2019
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(env) [oper@cc-pico utilities]$ ./setupDBBC3_DDC_V.py -n 4 192.168.0.60 --ignore-errors -i A B Selecting commandset version: DBBC3Commandset_DDC_V_123 ===Trying to connect to 192.168.0.60:4000 ===Connected ===Checking 1PPS synchronisation [WARN] The following boards report pps_delay=0: ['C', 'D'] [RESOLUTION] Check if these boards have been disabled in the DBBC3 config file === Checking time synchronisation of core board A [OK] Reported time: 2019-04-04 11:31:07 ===Checking synthesizer lock state of board A [OK] Locked ===Checking GCoMo synthesizer frequency of board A [OK] Freq=9048 MHz === Checking IF power level on core board A [OK] count = 31895 ===Checking sampler gains for board A [OK] sampler powers = [70874617, 71217086, 71445220, 70643756] ===Checking sampler offsets for board A sampler 0 [OK] Asymmetry = 0.000604% ===Checking sampler offsets for board A sampler 1 [OK] Asymmetry = 0.006149% ===Checking sampler offsets for board A sampler 2 [OK] Asymmetry = 0.020379% ===Checking sampler offsets for board A sampler 3 [OK] Asymmetry = 0.014416% === Checking time synchronisation of core board B [OK] Reported time: 2019-04-04 11:31:18 ===Checking synthesizer lock state of board B [OK] Locked ===Checking GCoMo synthesizer frequency of board B [OK] Freq=9048 MHz === Checking IF power level on core board B [OK] count = 31750 ===Checking sampler gains for board B [OK] sampler powers = [82511346, 82256136, 85668418, 81651315] ===Checking sampler offsets for board B sampler 0 [OK] Asymmetry = 0.007875% ===Checking sampler offsets for board B sampler 1 [OK] Asymmetry = 0.003713% ===Checking sampler offsets for board B sampler 2 [OK] Asymmetry = 0.012987% ===Checking sampler offsets for board B sampler 3 [OK] Asymmetry = 0.010675% === Done
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