--------------------------------- Summary of activitities at Pico Veleta 26.9. - 30.9. --------------------------------- 1) New field sytem computer A new PC was purchased and shipped to Pico. The new PC is called mrt-vlbi. Testing in conjunction with the Field System has revealed that the serial interface does not properly work with the MCB connection to the analog VLBA terminal. Probably the serial interface does not provide the required voltage of +-12V. Also a second serial interface is needed for operation of the analog VLBA terminal. Salvador has organised a PCI card containing two serial and one parallel interface. Update (30.9.): The serial card has arrived on the mountain and was build into the PC. Serial and parallel devices were properly recognized by Linux. After connecting the MCB and MAT connectors to the new serial ports the FS reports correct initialization of MAT and MCB. However it was decided for the upcoming mm-observations to use the old field system PC due to lack of time to thoroughly test the new system. 2) Field system upgrade Newest field system was installed on both field system PCs: mrt-vlbi2 and mrt-vlbi. Mostly untested due to lack of time. Decission was made together with Salvador to contine to use the current version (9.7.7) for the upcoming session 3) Upgrade of Mark5A recorder Upgrade of the mark5A recorder to a newer SDK version has failed because of the old kernel version (2.4) that is currently running on the mark5 computer. Upgrading to SDK 8.2 would require Kernel 2.6.18. Upgrade of the OS was postponed until after the upcoming session due to the risk of not having a functional recording system. 4) DBBC After unpacking the DBBC on Pico it has failed to work. The core boards were not detected in the JTAG chain. All boards were taken out of the DBBC and carefully inspected using a microscope in order to find broken soldering points in the JTag bus connecting the boards. No obvious damages were found (however the FilaIn board shows low quality soldering connections which should be further investigated). After carefully restacking the boards and putting them back to the case, ChipScope could recognize and program the boards again. However the last board did not have the upper PPS LED blinking. The first board had unsychronized PPS signals. Michael suggested to take the boards out again and carefully restack them. This procedure was followed a few times (4-5) until a working setup could be achieved. The DBBC was installed in the rack. A decission was made together with Salvador to the leave the system untouched and electronics switched on until the upcoming session. The DBBC at Pico suffers from a defect that prevents reconfiguration of the firmware from the internal PC. Even though rebooting the PC a few times typically solves the problem the Xiliinx ISE software (containing ChipScope and impact) was installed on the new field system computer allowing reconfiguration of the DBBC from the external PC. Salvador has been instructed how to use ChipScope for reconfiguration if neccessary. Zero-spacing fringe tests (tunable version): Noise + line was injected into modules A and B (as well as into the analog VLBA terminal). The DBBC and the analog system were used to simultaneously record one scan of data. Five seconds of data were extracted and transferrred by FTP to the correlator in Bonn. After Alessandra has fixed the track assignement fringes were detected. Test of the polyphase filterbank setup: The latest polyphase filterbank firmware and control software received by Gino was installed on the DBBC. The DBBC was reconfigured from the external PC to use the polyphase filterbank setup. Test have revealed that the Mark5B looses synchronisation very quickly in this setup. Offsets of a few seconds were observed after only a few minutes after resynchronization. Gino has suggested that this might be due to a bad connection of the VSI cable either on the Fila Out board or on the mark5b input. Due to fragile connections of the DBBC boards on Pico it was decided not to remove the VSI connection from the FilaOut board. The VSI cable at the side of the Mark5b was unplugged and cleaned. However the problems persist. Due to lack of time no further measures could be done at the time. Gino has suggested to remove the VSI cable from the FilaOut board and clean it after the the 1mm session has finished just before the upcoming 2-Gbit test. If the problem still exists the 2-Gbit recording test has to be cancelled. 5) DBBC Control The field system controlling the DBBC is installed on mark5b.iram.es (current version is 9.10.4). Communication to the DBBC via the FS is working. A recording test was done using a modified c112a schedule. For the polyphase filterbank test the latest drudg.pl script was installed on mark5b and tested. 6) General Preparations All disk modules were erased and the vsn was reset Pending items: - Test new field system PC - Test new field system version - Upgrade of mark5a to a newer OS (kernel 2.6.18 or higher). Updrade of SDK version to 8.2 or 8.3